Prototype Deep Learning Networks on FPGA

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Estimate performance of series networks. Profile and retrieve inference results from target devices using MATLAB^®

Deep Learning HDL Toolbox™ provides classes to create objects to deploy series deep learning networks to target FPGA and SoC boards. Before deploying deep learning networks onto target FPGA and SoC boards, leverage the methods to estimate the performance and resource utilization of the custom deep learning network. After you deploy the deep learning network, use MATLAB to retrieve the network prediction results from the target FPGA board.

Classes

`dlhdl.Workflow`	Configure deployment workflow for deep learning neural network
`dlhdl.Target`	Configure interface to target board for workflow deployment

Functions

`activations`	Retrieve intermediate layer results for deployed deep learning network
`validateConnection`	Validate SSH connection and deployed bitstream
`release`	Release the connection to the target device
`predict`	Run inference on deployed network and profile speed of neural network deployed on specified target device
`estimate`	Estimate performance of specified deep learning network and bitstream for target device board
`deploy`	Deploy the specified neural network to the target FPGA board
`compile`	Compile workflow object

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